dg3001/3002/3003 vishay siliconix new product document number: 72505 s-32069?rev. a, 27-oct-03 www.vishay.com 1 low-voltage sub-ohm spst/spdt micro foot analog switch features micro foot chip scale package (1.0 x 1.5 mm) low voltage operation (1.8 v to 5.5 v) low on-resistance - r ds(on ): 0.4 fast switching - t on : 47 ns, t off : 40 ns low power consumption ttl/cmos compatible benefits reduced power consumption simple logic interface high accuracy reduce board space applications cellular phones communication systems portable test equipment battery operated systems pcm cards pda description the dg3001/DG3002/dg3003 are monolithic cmos analog switches designed for high performance switching of analog signals. the dg3001 and DG3002 are configured as spst switches, and the dg3003 is an spdt switch. combining low power, high speed (t on : 47 ns, t off : 40 ns), low on-resistance (r ds(on) : 0.4 ) and small physical size (micro foot, 6-bump), the dg3001/DG3002/dg3003 are ideal for portable and battery powered applications requiring high performance and efficient use of board space. the dg3001/DG3002/dg3003 are built on vishay siliconix?s low voltage ji2 process. an epitaxial layer prevents latchup. each switch conducts equally well in both directions when on, and blocks up to the power supply level when off. functional block diagram and pin configuration no (source 1 ) com com b1 b2 b3 top view v+ in gnd a1 a2 a3 xxx 3001 device marking: 3001 xxx = date/lot traceability code a1 locator nc (source 1 ) com com b1 b2 b3 top view v+ in gnd a1 a2 a3 xxx 3002 device marking: 3002 xxx = date/lot traceability code a1 locator no (source 1 ) com nc (source 2 ) b1 b2 b3 top view v+ in gnd a1 a2 a3 xxx 3003 device marking: 3003 xxx = date/lot traceability code a1 locator dg3001db DG3002db dg3003db micro foot (6-bump) micro foot (6-bump) micro foot (6-bump) truth table logic nc no 0 on off 1 off on ordering information temp range package part number micro foot: 6 - bump dg3001db -40 to 85 c micro foot : 6 - b u mp (3 2, 0.5-mm pitch, 165 m nom bump height) DG3002db 165- m nom. bump height) dg3003db
dg3001/3002/3003 vishay siliconix new product www.vishay.com 2 document number: 72505 s-32069?rev. a, 27-oct-03 absolute maximum ratings reference to gnd v+ -0.3 to +6 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . in, com, nc, no a -0.3 to (v+ + 0.3 v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous current (no, nc, com) 250 ma . . . . . . . . . . . . . . . . . . . . . . . . peak current 400 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (pulsed at 1 ms, 10% duty cycle) storage temperature (d suf fix) -65 to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . package reflow conditions b vpr 215 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ir/convection 220 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . power dissipation (packages) c 6-bump, 2 x 3 micro foot d 250 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . notes: a signals on nc, no, or com or in exceeding v+ will be clamped by internal diodes. limit forward diode current to maximum current ratings. b refer to ipc/jedec (j-std-020a) c all bumps soldered to pc board. d derate 3.1 mw/ c above 70 c specifications (v+ = 3.0 v) test conditions otherwise unless specified limits ? 40 to 85 c parameter symbol v+ = 3 v, 10%, v in = 0.4 or 2.0 v e temp a min b typ c max b unit analog switch analog signal range d v no , v nc , v com full 0 v+ v on-resistance d r on v+ = 2.7 v, v com = 1.5 v, i no , i nc = 10 ma room full 0.4 0.7 0.8 r on flatness d r on flatness v+ = 2.7 v, v com = 0 to v+, i no , i nc = 10 ma room 0.1 0.2 r on match d r on v+ = 2 . 7 v , v com = 0 to v+ , i no , i nc = 10 ma room 0.01 0.05 switch off leakage current f i no(off), i nc(off) v+ = 3.3 v room full 1 ? 10 1 10 switch off leakage current f i com(off) v+ = 3 . 3 v v no, v nc = 0.3 v/3 v, v com = 3 v/0.3 v room full 1 ? 10 1 10 na channel-on leakage current f i com(on) v+ = 3.3 v, v no, v nc = v com = 0.3 v/3 v room full 1 ? 10 1 10 digital control input high voltage v inh full 2 v input low voltage v inl full 0.4 v input capacitance d c in full 5 pf input current d i inl or i inh v in = 0 or v+ full ? 1 1 a dynamic characteristics turn-on time d t on v or v 20 v r 300 c 35 pf room full 47 71 turn-off time d t off v no or v nc = 2.0 v, r l = 300 , c l = 35 pf figure 1 and 2 room full 40 59 ns break-before-make time d t d room 1 6 charge injection d q inj c l = 1 nf, v gen = 0 v, r gen = 0 , figure 3 room 64 pc off-isolation d oirr r l = 50 c l = 5 pf f = 100 khz room ? 70 db crosstalk d x talk r l = 50 , c l = 5 pf, f = 100 khz room ? 70 db no, nc off capacitance d c no(off), c nc(off) v in = 0 or v+, f = 1 mhz room 100 pf channel-on capacitance d c on v in = 0 or v+ , f = 1 mhz room 340 pf power supply power supply range v+ 2.7 3.3 v power supply current d i+ v in = 0 or v+ 0.1 1.0 a notes: a. room = 25 c, full = as determined by the operating suffix. b. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data s heet. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. guarantee by design, nor subjected to production test. e. v in = input voltage to perform proper function.
dg3001/3002/3003 vishay siliconix new product document number: 72505 s-32069?rev. a, 27-oct-03 www.vishay.com 3 typical characteristics (25 c unless noted) ? 60 ? 40 ? 20 0 20 40 60 80 100 10000 1000 1 supply current vs. temperature temperature ( c) i+ ? supply current (na) ? on-resistance ( r on ) 0.00 0.20 0.40 0.60 0.80 1.00 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 012345 r on vs. v com and single supply voltage v com ? analog voltage (v) v+ = 1.8 v v+ = 2 v v+ = 5 v r on vs. analog voltage and temperature ? on-resistance ( r on ) v com ? analog voltage (v) 85 c ? 40 c 25 c 10 v+ = 5 v v in = 0 v t = 25 c i s = 10 ma v+ = 2.7 v v+ = 3 v v+ = 3.3 v v+ = 3 v i s = 10 ma 100 supply current vs. input switching frequency input switching frequency (hz) i+ ? supply current (a) ? 250 ? 200 ? 150 ? 100 ? 50 0 50 100 150 200 250 012345 leakage vs. analog voltage v com , v no , v nc ? analog voltage (v) 10 10 k 100 k 10 m 100 1 k 1 m 100 ma 1 ma 100 a 10 a 1 a v+ = 5 v ? 60 ? 40 ? 20 0 20 40 60 80 100 10 1000 leakage current vs. temperature temperature ( c) v+ = 5 v 100 leakage current (pa) i no(off) , i nc(off) i com(off) i com(on) leakage current (pa) v+ = 5 v i no(off) , i nc(off) i com(off) i com(on) 100 na 1 na 10 na 10 ma
dg3001/3002/3003 vishay siliconix new product www.vishay.com 4 document number: 72505 s-32069?rev. a, 27-oct-03 typical characteristics (25 c unless noted) ? 90 ? 20 10 loss, oirr, x insertion loss, off-isolation, crosstalk vs. frequency frequency (hz) ? 10 0 0 10 20 30 40 50 60 70 80 90 100 ? 60 ? 40 ? 200 20406080100 t on v+ = 2 v switching time vs. temperature and supply voltage temperature ( c) 10 m 1 g 100 m 1 m 100 k t on ,t off ? switching time (ns) t on v+ = 3 v t off v+ = 2 v t off v+ = 3 v ? 30 ? 40 ? 50 ? 60 ? 70 ? 80 talk (db) v+ = 3 v r l = 50 loss oirr x talk 0.0 0.5 1.0 1.5 2.0 2.5 3.0 01234567 v+ ? supply voltage (v) v t ? switching threshold (v) switching threshold vs. supply voltage ? 250 ? 200 ? 150 ? 100 ? 50 0 50 100 150 200 250 012345 v com ? analog voltage (v) q ? charge injection (pc) charge injection vs. analog voltage v+ = 2 v v+ = 3 v v+ = 5 v
dg3001/3002/3003 vishay siliconix new product document number: 72505 s-32069?rev. a, 27-oct-03 www.vishay.com 5 test circuits figure 1. switching time figure 2. break-before-make interval figure 3. charge injection c l (includes fixture and stray capacitance) nc v no no switch input c l (includes fixture and stray capacitance) v+ in no or nc c l 35 pf com logic input r l 300 v out gnd v+ 50% 0 v logic input switch output t on t off logic ?1? = switch on logic input waveforms inverted for switches that have the opposite logic sense. off on on in v out v out q = v out x c l c l = 1 nf com r gen v out nc or no v in = 0 ? v+ in v gen gnd v+ v+ switch output v out v com r l r l r on 0.9 x v out t r 5 ns t f 5 ns in depends on switch configuration: input polarity determined by sense of switch. + v nc 0 v logic input switch output v o v nc = v no t r <5 ns t f <5 ns 90% t d t d in com v+ gnd v+ c l 35 pf v o r l 300 v inh v inl v inh v inl
dg3001/3002/3003 vishay siliconix new product www.vishay.com 6 document number: 72505 s-32069?rev. a, 27-oct-03 test circuits figure 4. off-isolation figure 5. channel off/on capacitance nc or no f = 1 mhz in com gnd 0 v, 2.4 v meter hp4192a impedance analyzer or equivalent 10 nf v+ v+ in gnd nc or no 0v, 2.4 v 10 nf com off isolation 20 log v com v no nc r l analyzer v+ v+
dg3001/3002/3003 vishay siliconix new product document number: 72505 s-32069?rev. a, 27-oct-03 www.vishay.com 7 package outline micro foot: 6-bump (3 x 2, 0.5-mm pitch, 165- m bump height) notes (unless otherwise specified): 1. bump is eutectic 63/57 sn/pb. 2. non-solder mask defined copper landing pad. 3. laser mark on silicon die back; no coating. shown is not actual marking; sample only. index-bump a1 note 3 top side (die back) xxx 3003 recommended land pattern 0.5 0.5 6 0.150
0.180 note 2 solder mask
pad dia. + 0.1 silicon bump note 1 b diameter 321 a b e d e a a 2 a 1 s s e millimeters* inches dim min max min max a 0.610 0.685 0.0240 0.0270 a 1 0.140 0.190 0.0055 0.0075 a 2 0.470 0.495 0.0185 0.0195 b 0.180 0.250 0.0071 0.0098 d 1.490 1.515 0.0587 0.0596 e 0.990 1.015 0.0390 0.0400 e 0.5 basic 0.0197 basic s 0.245 0.258 0.0096 0.0101 * use millimeters as the primary measurement.
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